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y/c/rgb/d for pal/ntsc/secam color tvs description the CXA2060BS is a bipolar ic which integrates the luminance signal processing, chroma signal processing, rgb signal processing, and sync and deflection signal processing functions for pal/ ntsc/secam system color tvs onto a single chip. this ic includes deflection processing functions for wide-screen tvs. with a secam decoder and 1h delay line built in for pal/secam, this ic can be used in configuring multi-color system tv set. features supports the i 2 c bus 1h delay line and secam decoder supports ntsc/pal-n/pal-m systems with three crystal pins deflection compensation circuit for support of various wide modes count down system eliminates need for v oscillation frequency adjustment automatic identification of 50/60hz vertical frequency (forced control possible) supports non-interlace display (even/odd selectable) automatic identification of pal, ntsc and secam color systems (forced control possible) automatic identification of 4.43mhz/3.58mhz for crystal (forced control possible) no adjustment of y/c filter required three cv inputs, two y/c inputs (y/c input shared with cv input), one y/c input supporting external comb filter, two rgb inputs dynamic picture/dynamic color circuit akb and gamma correction circuits ys1 can be forcibly turned off fsc output (shared with pal-n crystal pin) applications color tvs (4:3, 16:9) structure bipolar silicon monolithic ic absolute maximum ratings (ta = 25?, gnd1, 2 = 0v) supply voltage v cc 1 , 2 ?.3 to +12 v operating temperature topr ?0 to +75 ? storage temperature tstg ?5 to +150 ? allowable power dissipation p d 1.5 w (when mounted on a 50mm 50mm board) voltage at each pin ?.3 to v cc 1 , 2 + 0.3 v operating conditions supply voltage v cc 1 , 2 9 0.5 v ?1 e98631-ps sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. CXA2060BS 48 pin sdip (plastic)
? 2 CXA2060BS block diagram c o l o r a m p < c o l o r > < c o f f > a x i s < a x i s p a l > < a x i s n t s c > 5 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 1 2 2 2 3 2 4 3 0 3 5 3 4 3 1 3 3 1 i k i n b o u t g o u t r o u t s d a s c l v d v d + e w t v / c 2 i n c 1 i n c v b s 2 / y 2 i n c v b s 1 / y 1 i n c o m b c i n c o m b y i n m o n o u t a p e d v m o u t / v p r o t e b - y i n e r - y i n e y i n y u v s w r 1 i n g 1 i n b 1 i n y s 1 r 2 i n ( y o u t ) g 2 i n ( r - y o u t ) b 2 i n ( b - y o u t ) y s 2 / y m s c p v t i m h p / p r o t e c t v c c 1 g n d 1 i r e f r e g h d < x t a l > < c o l s y s t e m > < c o l l o o p > < n o c o l o r > a p c < h u e > c v c o 4 . 4 3 3 6 1 9 m h z 3 . 5 7 9 5 4 5 m h z 3 . 5 7 5 6 1 1 m h z 3 . 5 8 2 0 5 6 m h z p a l / n t s c d e m o d . a c c d e t . c h r o m a a m p a c c d e t . a c c a m p b p f p a l : 4 . 4 3 m h z n t s c : 3 . 5 8 m h z < c b p f > b e l l f i l t e r l i m a m p p l l s e c a m f m d e m o d . d e - e m p h a s i s l i n e b l k s e c a m v c o c a l . b y 4 . 4 3 m h z 8 4 0 4 4 4 5 a p c f i l v c c 2 g n d 2 y c l a m p 4 6 4 7 4 8 x ' t a l 1 x ' t a l 2 x ' t a l 3 s w n t s c / p a l , s e c a m k i l l e r < k i l l e r o f f > s e c a m p a l / n t s c f i l t e r a l i g n m e n t c a l . b y f s c a c c a m p c h r o m a a t t t r a p p a l : 4 . 4 3 m h z n t s c : 3 . 5 8 m h z s e c a m : 4 . 2 + 4 . 4 3 m h z < t r a p o f f > d l p a l / n t s c s e c a m < y d e l a y > s h a r p n e s s d l s h a r p n e s s a m p < s h a r p n e s s > < s h p f 0 > 1 h d e l a y l i n e ( p a l / s e c a m ) d p i c < d p i c > < a g i n g > c l a m p d c t r a n < d c t r a n > c h r o m a s w y s w m o n i t o r s w v i d e o s w 2 4 6 7 9 4 1 4 3 < v i d e o s e l > < s s e l > c o u n t d o w n < f i e l d f r e q > < c d m o d e > v s y n c s e p < v s s > h s y n c s e p < h s s > < h m a s k > < < r f l e v e l > > l i n e c o u n t e r v t i m g e n . < v u n d e r s c a n > < < f i e l d i d > > v s a w g e n . ( 5 0 / 6 0 ) v t i m a f c < a f c g a i n > < f h h i g h > < < h l o c k > > < < h c e n t > > y h s a w g e n . < h o s c > h t i m g e n . < h b l k > < l e f t h b l k > < r i g h t h b l k > 2 0 a f c f i l p h a s e d e t . < h p o s i t i o n > < a f c b o w > < a f c a n g l e > h p r o t < < h n g > > h d g e n . < h d w > e y u v c l a m p y u v s w < y s e l > y u v o u t < y u v o u t > 3 9 3 8 3 7 3 6 y / c m i x r g b c l a m p v p r o t < < v n g > > v m a m p ( o f f y s / y m ) d y n a m i c c o l o r < d y n a m i c c > y s 1 s w < r g b s e l > y m s w y s 2 s w p i c t u r e a m p g a m m a a m p < g a m m a > b r i g h t c o n t . d r i v e a m p < r / g / b d r i v e > c l a m p c u t o f f c o n t . < r / g / b c u t o f f > r / g / b b l k < r / g / b o n > c l a m p r g b 1 / 2 a b l / p e a k l i m < a b l m o d e > < a b l v t h > a k b < > 3 4 2 a b l f i l a b l i n 2 6 2 9 3 2 i 2 c b u s d e c o d e r s t a t u s i / f d a c s w v d s a w f u n c . < v o n > < v s i z e > < v p o s i t i o n > < s c o r r e c t i o n > < v l i n e a r i t y > < e h t c o m p > e w p a r a b o l a f u n c . < h s i z e > < c o r n e r p i n > < t r a p e z i u m > < e w d c > w i d e s a w f u n c . < a s p e c t > < s c r o l l > < l o w e r v l i n > < v z o o m > < v u n d e r s c a n > i r e f r e g 2 7 c o l o r s y s t e m d i s c r i m i n a t o r < < a p c l o c k > > < > < < s e c a m > > < < x t a l i d > > 2 5 2 8
? 3 CXA2060BS pin configuration c 1 i n a b l i n c v b s 1 / y 1 i n v t i m m o n o u t c o m b c i n c o m b y i n a p e d y c l a m p g n d 1 e w i r e f v d v d + v m o u t / v p r o t r e g s c p h d h p / p r o t e c t a f c f i l i k i n g o u t r o u t b o u t x ' t a l 2 x ' t a l 3 x ' t a l 1 v c c 2 t v / c 2 i n a p c f i l c v b s 2 / y 2 i n g n d 2 a b l f i l e b - y i n e y i n y u v s w e r - y i n s c l v c c 1 s d a r 2 i n b 2 i n y s 2 / y m g 2 i n r 1 i n b 1 i n g 1 i n y s 1 1 4 5 6 7 8 9 1 0 2 3 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 3 1 3 2 3 3 3 4 3 5 3 6 3 7 3 8 3 9 4 0 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8
? 4 CXA2060BS pin description chroma signal input. input a chroma signal having a burst level of 300mvp-p via a 0.01 f capacitor. normally the s pin signal is input. pin no. symbol equivalent circuit description 1 aped connects a capacitor for black peak hold of the dynamic picture feature (black extension). the 4.7 f capacitor is connected to gnd. 2 c1 in 3 abl in this pin is for both abl control signal input and vd high-voltage correction signal input. high-voltage correction has linear control characteristics when this pin's voltage is in the approximate range of 1v and 8v. control characteristics can be varied using the eht_comp control of the bus. abl functions as a pic/brt-abl (average value type). the threshold voltage at which abl activates can be switched to either 3v or 1v depending on the bus. 4 cvbs1/y1 in cvbs signal/luminance signal input. input a 1vp-p (100% white including sync) cvbs signal via a 1 f capacitor. input the y signal when a separated y/c signal is input. 1 9 4 k 1 k 1 . 9 3 k 7 . 8 k 8 k 5 0 k 1 4 7 5 . 4 v 2 1 4 7 1 3 0 k 3 8 6 k 5 0 k 1 4 7 5 . 4 v 4
? 5 CXA2060BS chroma signal input from a comb filter. the input chroma signal is a 0.6vp-p burst signal. pin no. symbol equivalent circuit description 6 mon out output of the signal input from tv, cvbs1 or cvbs2 as selected by video sel and s sel of the bus. in the case of s pin input, a luminance signal and chroma signal are mixed and output. output level is 2vp-p including sync. 7 comb c in 8 y clamp connects a capacitor for luminance signal clamp. the 0.1 f capacitor is connected to gnd. 9 comb y in luminance signal input from a comb filter. the signal is input via a 1 f capacitor and has a level of 2vp-p. (100% white including sync) 1 4 7 1 0 0 a 1 0 0 a 6 2 5 k 1 4 7 5 . 4 v 2 5 k 7 1 0 p 1 . 5 k 8 4 k 4 k 2 5 k 1 4 7 5 . 4 v 2 5 k 9 5 v tim v timing pulse output. this is a 0/5v negative polarity pulse. hss/vss can be monitored using the v tim sel register. 1 4 7 5 2 5 k 1 0 0 a
? 6 CXA2060BS pin no. symbol equivalent circuit description 12 i ref this pin is used to set the reference current within the ic. a 10k w resistor (metallic film resistor) having an error less than 1% is connected to gnd. 13 vd+ 14 vd v sawtooth wave output. the polarity of pin 13 output and pin 14 output are reversed. 1 4 7 7 . 2 k 1 2 2 k 1 3 2 k 1 4 11 ew v parabola wave output. 1 . 2 k 1 1 10 gnd1 gnd for 1hdl and deflection system circuit.
? 7 CXA2060BS 15 vm out/ v prot output of luminance signal differential waveform for vm (velocity modulation). the phase of vm output is synchronized to the phase of rgb output. it is approximately 250ns ahead of rgb output. this pin is also used for v protect signal input. when the large current (4ma) is forcibly drawn through this pin, all rgb output is blanked, and 1 is output to the status register vng. 1 k 1 4 7 1 5 1 k 16 reg decoupling capacitance for the regulator within the ic. the 47 f capacitor is connected to gnd. 4 . 4 k 5 0 0 1 6 h deflection pulse input for h afc. the 5vp-p pulse is input via a capacitor. since this pin is also used to input an x- ray protect signal, a hold down function activates if this pin's voltage goes above a "7v cycle" and below 1v. if this occurs, hd output goes high impedance, rgb output is blanked, and 1 is output to the status register hng. it is necessary to turn the ic's power off then on again to cancel this status. pin no. symbol equivalent circuit description 17 scp sand castle pulse output. the sand castle pulse is a waveform superimposed with the burst gate pulse on the composite blanking pulse. 18 hp/protect 2 5 k 5 0 a 1 7 1 4 7 1 4 7 1 8 9 6 k 1 0 k 6 0 k 5 0 a 1 0 0 a
? 8 CXA2060BS pin no. symbol equivalent circuit description 22 23 24 r out g out b out rgb signal output. outputs 3.0vp-p during 100% white input. picture: 3fh drive: 3fh bright: 1fh 2 m a 1 2 k 2 0 0 2 2 2 3 2 4 21 ik in crt beam current input (cathode current ik). this current is converted into voltage within the ic. in order to eliminate any adverse effects exercised by crt leak current (max. 100 a) for akb operation, it is clamped at the v blanking interval. the akb loop is activated by comparing the reference pulse component of this signal to the reference voltage within the ic. the rgb output cutoff can be varied using cutoff of the bus. the ik reference signal current can be controlled 50% around a 13 a center. since the beam current of the video section is large, be sure to attach a zener diode of about 4v to the pin to protect the ic. 1 4 7 2 1 3 k 4 k 19 hd h drive signal output. this is open collector output for the npn transistor. 20 afc fil connects an afc lag lead filter. cr is connected to gnd. 1 4 7 2 0 k 2 0 k 1 9 1 4 7 1 0 0 k 2 0 3 0 k 1 k 1 0 0 k
? 9 CXA2060BS ys1 switch control pin. selects rgb1 input. ys1 vth: 0.7v this pin is also used as the slave address modification switch. if the voltage at this pin goes over 7v, the slave address is changed from 88h to 8ah. slave address vth: 7v 25 ys1 26 27 28 b1 in g1 in r1 in rgb1 signal input. a 0.7vp-p (no-sync 100 ire) signal is input via a 0.01 f capacitor. the input signal is clamped at the scp burst timing. 29 ys2/ym ys2/ym switch control pin. selects rgb2 input. when operating at high level (ym vth: 0.7v) as a ym switch the output signal undergoes 10db attenuation. ys2 vth: 2v 2 5 1 4 7 3 0 k 1 . 2 k 6 0 k 2 6 2 7 2 8 2 9 1 4 7 7 k 1 3 k 30 31 32 b2 in g2 in r2 in rgb2 signal input. a 0.7vp-p (no-sync 100 ire) signal is input via a 0.01 f capacitor. the input signal is clamped at the scp burst timing just as rgb1 in. this pin becomes the yuv output pin based on the yuv out register. be sure to pull up this pin by 10k w when used for yuv output. 3 0 3 2 1 . 2 k 6 0 k 3 1 1 0 0 33 vcc1 power pin for the signal block and deflection block. pin no. symbol equivalent circuit description
? 10 CXA2060BS i 2 c bus standard sda (serial data) input/output. pin no. symbol equivalent circuit description 34 scl i 2 c bus standard scl (serial clock) input. 35 sda 36 yuv sw yuv sw control pin. selects external yuv input. vth: 0.7v this switch includes a function for forcibly turning off external y input only using y sel of the bus. 37 ey in 3 4 4 k 1 0 k 3 5 4 k 7 . 5 k 7 . 5 k 3 6 1 4 7 2 0 k 1 . 5 k 4 0 k 3 7 38 39 er-y in eb-y in external y/r-y/b-y signal input. input is via a 0.01 f capacitor. ey in: 0.7vp-p (no sync) er-y in: 0.735vp-p (75% color bar) eb-y in: 0.931vp-p (75% color bar) 1 . 5 k 6 5 k 3 9 3 8 40 gnd2 gnd pin for signal block circuits.
? 11 CXA2060BS input of cvbs signal from a tv tuner or chroma signal. a 1vp-p (including sync) cvbs signal or 300mvp-p burst chroma signal is input via a 1 f capacitor. pin no. symbol equivalent circuit description 41 cvbs2/y2 in cvbs signal/luminance signal input. a 1vp-p signal (including sync) is input via a 1 f capacitor. input the y signal when a separated y/c signal is input. 42 abl fil connects the capacitor (4.7 f) forming the abl control signal lpf to gnd. 43 tv/c2 in 5 0 k 1 4 7 5 . 4 v 4 1 1 . 2 k 4 2 2 0 k 2 0 0 k 5 0 k 1 4 7 5 . 4 v 4 3 45 apc fil connects a chroma apc lag lead filter. cr is connected to gnd. 1 k 4 5 4 . 6 v 1 k 44 vcc2 power pin for the signal block.
? 12 CXA2060BS 46 x'tal 3 connects an apc crystal. the crystals should be connected as follows. x'tal 3: pal-n crystal (3.58205625mhz) x'tal 2: ntsc crystal (3.579545mhz) x'tal 1: pal/secam crystal (4.43361875mhz) or pal-m crystal (3.57561149mhz) pin 46 can be switched for use as fsc output using the fscsw register. 2v dc, 0.7vp-p signal is output. 2 k 1 . 3 3 k 4 6 pin no. symbol equivalent circuit description 47 x'tal 2 48 x'tal 1 2 k 1 . 3 3 k 4 7 4 8 2 k 1 . 3 3 k 1 k
? 13 CXA2060BS electrical characteristics measurement conditions set i 2 c bus registers to i 2 c bus register initial setting values and measure them. ta = 25 c, v cc 1, v cc 2 = 9v, gnd1, gnd2 = 0v 1 no. item current consumption symbol i cc measurement conditions v cc 1, v cc 2 = 9v bus data: initial setting values measure- ment pin 33, 44 measurement contents measure the current flowing into the pin. min. typ. max. unit 80 125 170 ma 2 horizontal free-running frequency fhfr hosc = 7 (no input signal) fh high = 1 19 18 17 h drive output frequency 15.5 15.7 15.9 khz 3 horizontal free-running frequency 2 fhhifr fh high = 0 4 hd pulse width hdw hdw = 0 5 hd pulse width 2 hdw hdw = 1 t str (hp) = 7.5 s, t hp = 12 s 6 hp phase hpph hpph = hp (cent) ?hsync (cent) 8 h blk pulse width hblkw 7 h blk phase hblkph hblkph = scp (hblkrise) hsync (cent) 10 bgp pulse width bgpw 9 bgp phase bgpph bgpph = scp (bgprise) hsync (cent) 16.2 16.7 17.2 khz 22.5 24 25.5 s 19 20 21 s 3.0 3.7 4.4 s 9 10 11 s ?.5 ?.75 ? s 2.8 3.0 3.2 s 3.4 3.9 4.4 s sync deflection block items h d w h d h d w 1 2 s h p p h h s y n c 7 . 5 s h d h p h s y n c s c p b g p p h h b l k p h h b l k w b g p w
? 14 CXA2060BS 5 13 11 11 vtim phase vtimph c/d non-standard mode vtimph = vtim (fall) ?vsync (fall) 12 vtim pulse width vtimw 15 v drive output center voltage (60hz) d vsdc 60hz ?50hz d vsdc = vsdc2 ?vsdc1 16 v drive output amplitude (60hz) d vsp-p 60hz/50hz d vsp-p = vsp-p2/vsp-p1 100 17 ew drive output center voltage (50hz) vewdc1 50hz 18 ew drive output amplitude (50hz) vewp-p 50hz vewp-p = vewdc1 ?vewdc0 10 20 30 s 45 60 75 s ?0 0 10 mv 99 100 101 % 3.9 4.1 4.3 v 450 560 670 mv v t i m p h v t i m w v s y n c v t i m 8 . 7 8 m s v s d c 2 v s p - p 2 v s y n c v d + 13 13 v drive output center voltage (50hz) vsdc1 50hz 14 v drive output amplitude (50hz) vsp-p1 50hz 3.4 3.6 3.8 v 1.2 1.35 1.5 v 1 0 . 6 m s v s d c 1 v s p - p 1 v s y n c v d + v s y n c e w 1 0 . 6 m s 1 . 5 m s v e w d c 0 v e w d c 1 no. item symbol measurement conditions measure- ment pin measurement contents min. typ. max. unit
? 15 CXA2060BS 21 21 24 ik current (max.) iik r cutoff = fh g cutoff = fh b cutoff = fh iik = (vrrf ?v0)/4k 25 ik current (min.) d iik r cutoff = 0h g cutoff = 0h b cutoff = 0h iikmin/iikmax 15 22 29 a 27 32 37 % 11 22 23 24 19 ew drive output center voltage (60hz) d vewdc 60hz ?50hz d vewdc = vewdc2 ?vewdc1 20 ew drive output amplitude (60hz) d vewp-p 60hz/50hz d vewp-p = (vewdc2 ?vewdc20) / vewp-p 100 21 22 23 r blk voltage g blk voltage b blk voltage vrblk vgblk vbblk p on = 0 ?0 0 10 mv 97 100 103 % 0 0.15 0.3 v 0 0.15 0.3 v 0 0.15 0.3 v v s y n c e w 8 . 7 8 m s 1 . 5 m s v e w d c 2 0 v e w d c 2 t v / c 2 i n i k i n ( m a x . ) 2 2 h 2 3 h 2 4 h 2 5 h 2 6 h 2 7 h i k i n ( m i n . ) v 0 v r r f v g r f v b r f v 0 v g r f v b r f v r r f v g r f v b r f 32 26 luminance (y) output vy yuv out = 1 vy = v1 ?v0 610 670 730 mv 0 . 7 v t v / c 2 i n r 2 i n ( y o u t ) v 1 v 0 measure the pin voltage. signal block items no. item symbol measurement conditions measure- ment pin measurement contents min. typ. max. unit
? 16 CXA2060BS 22, 23, 24 28 rgb bright voltage vbrt black level ?ref. p. level rch: vbrtr = vrb ?vrrf gch: vbrtg = vgb ?vgrf bch: vbrtb = vbb ?vbrf ?50 ?00 ?50 mv 22, 23, 24 27 rgb amplitude ratio d g d g r = 20 log ((vr1 ?vr0)/vy) d g g = 20 log ((vg1 ?vg0)/vy) d g b = 20 log ((vb1 ?vb0)/vy) 12 13.5 15 db 0 . 7 v v r 1 v r 0 t v / c 2 i n r o u t v r 1 v r 0 g o u t v g 1 v g 0 b o u t v b 1 v b 0 t v / c 2 i n r o u t 2 2 h 2 3 h 2 4 h 2 5 h 2 6 h 2 7 h g o u t v r r f v r b v g r f v g b v b b v b r f b o u t 31 30 29 secam color difference (r-y) output vr-y secam signal (75%) vr-y = vr1 ?vr0 30 secam color difference (b-y) output vb-y secam signal (75%) vb-y = vb1 ?vb0 690 800 910 mv 880 1040 1200 mv a a a a a a a t v / c 2 i n g 2 i n ( r - y o u t ) b 2 i n ( b - y o u t ) b - y r - y b l u e r e d y e l l o w c y a n b - y i d r - y i d v r 1 v r 0 v b 1 v b 0 no. item symbol measurement conditions measure- ment pin measurement contents min. typ. max. unit
? 17 CXA2060BS 31 30 31 pal color difference (r-y) output vr-y pal signal vr-y = vr1 ?vr0 32 pal color difference (b-y) output vb-y pal signal vb-y = vb1 ?vb0 900 1000 1100 mv 430 500 570 mv a a a a a a v r 1 v r 0 7 0 0 m v p - p 9 0 d e g 4 0 0 m v p - p 0 d e g g 2 i n ( r - y o u t ) b 2 i n ( b - y o u t ) v b 1 v b 0 t v / c 2 i n 30, 31 33 hue center offset f offset yuv out = 1, ntsc signal f offset = tan ? (4/7 ((vb1 ?vb0) / (vb2 ?vb0))) ? 0 6 deg v b 0 v b 1 v b 2 b 2 i n ( b - y o u t ) a a a a a a 7 0 0 m v p - p 9 0 d e g 4 0 0 m v p - p 0 d e g t v / c 2 i n 15 34 vm output vvm 3.58mhz 700mvp-p 1.8 2.3 2.8 v a a a a a a a a 7 0 0 m v p - p 3 . 5 8 m h z v v m v m o u t / v p r o t t v / c 2 i n 46 35 fsc output vfsc fsc sw = 1 500 900 1300 mv v f s c f s c o u t no. item symbol measurement conditions measure- ment pin measurement contents min. typ. max. unit
? 18 CXA2060BS electrical characteristics measurement circuit signal sources are all gnd unless otherwise specified in the measurement column for electrical characteristics. 1 8 p 1 8 p 1 8 p p a l / s e c a m o r p a l - m x ' t a l n t s c x ' t a l p a l - n x ' t a l 0 . 2 2 1 0 k 2 2 0 p 0 . 1 4 7 0 . 0 1 0 . 0 1 0 . 0 1 1 0 0 1 0 0 1 0 0 0 . 1 4 7 0 . 0 1 0 . 0 1 0 . 0 1 0 . 0 1 0 . 0 1 0 . 0 1 1 4 . 7 1 1 0 0 1 0 0 t v / c 2 i n c v b s 2 / y 2 i n e x t y u v i n y u v s w s d a s c l v c c + 9 v r g b 2 i n y s 2 / y m r g b 1 i n y s 1 4 . 7 1 0 0 1 0 0 1 0 k 1 0 0 1 0 0 4 7 5 1 k 1 k 0 . 1 0 . 0 1 1 1 1 1 2 k 4 7 0 0 p 1 p s e u d o c r t 2 . 2 k h p g e n 5 1 k h d h p 7 s d e l a y c 1 i n a b l i n c v b s 1 / y 1 i n v t i m o u t m o n o u t c o m b c i n c o m b y i n e / w v p r o t v d o u t v m o u t s c p o u t h p r o t c 1 i n a b l i n c v b s 1 / y 1 i n v t i m m o n o u t c o m b c i n c o m b y i n a p e d y c l a m p g n d 1 e w i r e f v d v d + v m o u t / v p r o t r e g s c p h d h p / p r o t e c t a f c f i l i k i n g o u t r o u t b o u t x ' t a l 2 x ' t a l 3 x ' t a l 1 v c c 2 t v / c 2 i n a p c f i l c v b s 2 / y 2 i n g n d 2 a b l f i l e b - y i n e y i n y u v s w e r - y i n s c l v c c 1 s d a r 2 i n b 2 i n y s 2 / y m g 2 i n r 1 i n b 1 i n g 1 i n y s 1 9 v 1 4 5 6 7 8 9 1 0 2 3 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 3 1 3 2 3 3 3 4 3 5 3 6 3 7 3 8 3 9 4 0 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8
? 19 CXA2060BS hp gen circuit v d d 2 t 1 2 t 2 2 c d 2 a 2 b 2 q 2 q 1 t 1 1 t 2 1 c d 1 a 1 b 1 q 1 q v s s 2 0 0 0 p 1 0 k 9 v 1 k 1 k f r o m h d o u t 2 0 0 0 p 5 v 4 7 h p / p r o t e c t h d o u t h p / p r o t e c t d e l a y 7 s w i d t h 1 2 s t c 4 5 3 8 b p 2 3 4 5 6 7 8 1 9 1 0 1 1 1 2 1 4 1 5 1 6 1 0 k 1 3
? 20 CXA2060BS register name number of bits initial setting value description p on hd w axis pal v on fh high yuv out aging video sel s sel r on g on b on y sel x'tal col system col loop c bpf c trap off picture no color fsc sw color c off killer off hue shp f0 axis ntsc bright dc tran pre/over sharpness r cutoff g cutoff b cutoff 1 1 1 1 1 1 1 2 2 1 1 1 1 2 2 2 1 1 6 1 1 6 1 1 6 1 1 6 1 1 4 4 4 4 1 0 0 1 1 0 0 0 0 1 1 1 0 3 3 1 1 0 3fh 0 0 1fh 0 0 1fh 0 0 1fh 0 0 7h 7h 7h 7h rgb output on hd pulse width normal pal axis forced off vd on fh normal rgb2 in input mode aging off selects tv input selects tv/cvbs/blk r output on g output on b output on enables yuvsw switching automatically identified automatically identified automatically identified at 4std bpf on trap on max. value no signal = ntsc fsc off center value c signal on cancels killer off forced off mode center value f0 2.5mhz ntsc japan axis center value 100% 1:1 center value center value center value center value electrical characteristics measurement conditions (i 2 c bus register initial settings)
? 21 CXA2060BS register name number of bits initial setting value description r drive abl mode abl vth g drive dy col rgb sel b drive gamma h osc y delay field freq cd mode interlace h ss v ss v size h mask v position afc gain scorrection v linearity h size ew dc h position pin amp corner pin trapezium eht comp afc bow afc angle left hblk right hblk aspect h blk vunderscan 6 1 1 6 1 1 6 2 4 4 2 2 2 1 1 6 1 6 2 4 4 6 1 6 6 6 4 4 4 4 4 4 6 1 1 3fh 1 0 3fh 0 0 3fh 0 7h 7h 0 0 0 0 0 1fh 0 1fh 1 0 7h 1fh 0 1fh 1fh 1fh 7h fh 7h 7h 7h 7h 2fh 0 0 max. value picture/bright shared mode vth = 3v max. value dynamic color off enables ys1 sw switching max. value gamma correction off center value center value automatically identified (free-running 50hz) standard mode interlace mode 1/3 from sync tip 1/3 from sync tip center value macrovision countermeasure off center value gain medium no correction 100% center value dc level standard mode center value center value center value center value max. correction level center value center value center value center value center value h blk width variability off off
? 22 CXA2060BS register name number of bits initial setting value description scroll v zoom upper vlin lower vlin v tim sel id stop id start bell f0 id level 6 1 4 4 2 2 2 6 2 1fh 0 0 0 0 1 2 1fh 1 center value zoom off linearity 100% linearity 100% v timing pulse output center value center value center value center value
? 23 CXA2060BS application circuit 1 8 p 1 8 p 1 8 p p a l / s e c a m o r p a l - m x ' t a l n t s c x ' t a l p a l - n x ' t a l 0 . 2 2 1 0 k 2 2 0 p 0 . 1 4 7 0 . 0 1 0 . 0 1 0 . 0 1 1 0 0 1 0 0 1 0 0 0 . 1 4 7 0 . 0 1 0 . 0 1 0 . 0 1 0 . 0 1 0 . 0 1 0 . 0 1 1 4 . 7 1 1 0 0 1 0 0 v c c + 9 v 4 . 7 1 0 0 1 0 0 1 0 k 1 0 0 1 0 0 4 7 5 1 k 1 k 0 . 1 0 . 0 1 1 1 1 1 2 k 4 7 0 0 p 1 c o m b 2 . 2 k 5 1 k e x t e r n a l y u v i n p u t c v b s / s i n p u t 2 i 2 c e x t e r n a l r g b i n p u t 2 e x t e r n a l r g b i n p u t 1 1 0 0 0 . 1 1 0 k 1 0 0 1 0 0 1 0 0 r g b o u t p u t i k i n p u t x - r a y p r o t e c t i o n s i g n a l i n p u t h d r i v e o u t p u t h d e f l e c t i o n p u l s e i n p u t s a n d c a s t l e p u l s e o u t p u t v m o u t p u t v s a w t o o t h w a v e o u t p u t v p r o t e c t s i g n a l i n p u t v p a r a b o l a w a v e o u t p u t a b l / h i g h v o l t a g e c o r r e c t i o n s i g n a l i n p u t m o n o u t p u t v t i m i n g p u l s e o u t p u t c v b s / s i n p u t c 1 i n a b l i n c v b s 1 / y 1 i n v t i m m o n o u t c o m b c i n c o m b y i n a p e d y c l a m p g n d 1 e w i r e f v d v d + v m o u t / v p r o t r e g s c p h d h p / p r o t e c t a f c f i l i k i n g o u t r o u t b o u t x ' t a l 2 x ' t a l 3 x ' t a l 1 v c c 2 t v / c 2 i n a p c f i l c v b s 2 / y 2 i n g n d 2 a b l f i l e b - y i n e y i n y u v s w e r - y i n s c l v c c 1 s d a r 2 i n b 2 i n y s 2 / y m g 2 i n r 1 i n b 1 i n g 1 i n y s 1 1 0 k 1 0 k 1 0 k 3 0 3 1 3 2 v c c d u r i n g c d e c m o d e 1 0 0 1 4 5 6 7 8 9 1 0 2 3 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 3 1 3 2 3 3 3 4 3 5 3 6 3 7 3 8 3 9 4 0 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 application circuits shown are typical examples illustrating the operation of the devices. sony cannot assume responsibility fo r any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same .
? 24 CXA2060BS s sel col system picture color hue bright r drive g drive b drive v size v position h size h position pin amp corner pin aspect scroll register table sleve address slave add pin = gnd 88h: slave receiver 89h: slave transmitter slave add pin = v cc 8ah: slave receiver 8bh: slave transmitter control register (sub address 00000 results in power-on-reset) bit0 bit1 bit2 bit3 bit4 bit5 bit6 bit7 sub address x x x 0 0 0 0 0 x x x 0 0 0 0 1 x x x 0 0 0 1 0 x x x 0 0 0 1 1 x x x 0 0 1 0 0 x x x 0 0 1 0 1 x x x 0 0 1 1 0 x x x 0 0 1 1 1 x x x 0 1 0 0 0 x x x 0 1 0 0 1 x x x 0 1 0 1 0 x x x 0 1 0 1 1 x x x 0 1 1 0 0 x x x 0 1 1 0 1 x x x 0 1 1 1 0 x x x 0 1 1 1 1 x x x 1 0 0 0 0 x x x 1 0 0 0 1 x x x 1 0 0 1 0 x x x 1 0 0 1 1 x x x 1 0 1 0 0 x x x 1 0 1 0 1 x x x 1 0 1 1 0 x x x 1 0 1 1 1 x x x 1 1 0 0 0 x x x 1 1 0 0 1 x x x 1 1 0 1 0 x x x 1 1 0 1 1 x x x 1 1 1 0 0 aging b on c bpf no color c off shp f0 dc tran 0 y sel c trap off fscsw killer off axis ntsc pre/over video sel x'tal yuv out g on fh high r on v on axis pal hd w p on status register field id 1 secam 0 pal apc lock rf level h ng no vsync v ng ikr h lock h cent x'tal id col loop sharpness g cutoff r cutoff b cutoff abl mode dy col abl vth rgb sel gamma h osc y delay field freq cd mode interlace h ss * v ss h mask afc gain s correction v linearity * * * * ew dc * * * trapezium afc bow left hblk eht comp afc angle right hblk h blk v zoom v under scan * upper vlin lower vlin 0 0 vtim sel id stop bell f0 id start id level 1st byte 2nd byte
? 25 CXA2060BS description of registers register name (number of bits) description 1. y signal block registers videosel (2) switches the video switch to select various input signals. enabled when s sel = 0 or 3. 0 = selects tv input signal 1 = selects cvbs1 input signal 2 = selects cvbs2 input signal 3 = mute s sel (2) selects y/c input signals. set video sel to 3 (mute) when s sel is set to 1 or 2. 0 = selects one of tv, cvbs1 or cvbs2 input, or mute 1 = selects y1/c1 input 2 = selects y2/c2 input 3 = selects y/c input from comb filter (in this case, select one of tv, cvbs1 or cvbs2 input, or mute for mon out.) c trap off (1) on/off switch for y block chroma trap filter set the chroma trap filter to off (= 1) using microcomputer control as necessary when apc lock and secam status are 0. 0 = trap filter on 1 = trap filter off shp f0 (1) switches sharpness f0 0 = 2.5mhz 1 = 3.0mhz sharpness (4) sharpness gain control 0h = ?2db 7h = +3.5db fh = +9db dc tran (1) switches the dc transmission rate 0 = 100% 1 = 85% pre/over (1) sharpness preshoot/overshoot control 0 = 1:1 1 = 2:1
? 26 CXA2060BS y delay (4) y signal delay control 0h = min fh = max y sel (1) internal y signal fixed mode on/off switch 0 = yuv sw (pin 36) standard operation (when pin 36 = high, selects ey in, er-y in, eb-y in input) 1 = ey in (pin 37) input only disabled (when pin 36 = high, selects internal y, er-y in, eb-y in input) aging (1) white output aging mode on/off switch (set to 0 at power on) 0 = aging mode off 1 = aging mode on (the y block outputs a 60 ire flat signal when there is no input signal.) 2. chroma signal block registers color system (2) color system setting 0 = forced pal 1 = forced secam 2 = forced ntsc 3 = automatic identification mode x'tal (2) crystal setting 0 = forced x'tal1 (pal/secam or pal-m crystal) 1 = forced x'tal2 (ntsc crystal) 2 = forced x'tal3 (pal-n crystal) 3 = automatic identification mode color loop (2) identification loop setting in color system automatic identification mode 0 = automatically identifies the three systems pal, secam and ntsc 4.43 (one crystal: 4.43 mhz) 1 = automatically identifies the four systems pal, secam, ntsc and ntsc 4.43 (two crystals: 4.43 and 3.58 mhz) 2 = automatically identifies the three systems pal-m, pal-n, and ntsc (three crystals) 3 = do not use hue (6) hue control (phase control for the chroma demodulation axis. enabled for ntsc only.) 0h = ?5 3fh = +35
? 27 CXA2060BS color (6) color gain control 0h = ?0db or less 1fh = 0db 3fh = +6db c off (1) chroma signal on/off switch 0 = chroma signal on 1 = chroma signal off fsc sw (1) fsc signal on/off switch 0 = fsc off: used as crystal pin 1 = fsc on: outputs 700mvp-p fsc c bpf (1) chroma band pass filter on/off switch 0 = band pass filter off 1 = band pass filter on axis ntsc (1) in ntsc mode, this switch selects japan axis or us axis color detection axis. this is valid when axis pal = 0. (this is automatically switched to pal/secam detection axis in pal/secam mode.) 0 = set to japan axis b-y: 0 /1, r-y: 95 /0.78, g-y: 236 /0.33 1 = set to us axis b-y: 0 /1, r-y: 102 /0.78, g-y: 236 /0.3 axis pal (1) switch for forcing the color detection axis to an orthogonal axis (pal axis) 0 = forced off 1 = orthogonal axis forced on b-y: 0 /1, r-y: 90 /0.57, g-y: 227 /0.34 no color (1) this switch switches the no signal definition for the chroma signal in the pal (/ntsc) status register. 0 = pal status register is 1 when there is no signal 1 = pal status register is 0 when there is no signal yuv out (1) this switch switches the r2 in, g2 in and b2 in input pins (pins 32, 31 and 30) to the y and color difference signal output pins. 0 = r2 in, g2 in and b2 in signal input mode 1 = pin 30: b-y output pin 31: r-y output pin 32: y output (at this time, connect each pin to vcc via a 10k w resistor.) killer off (1) color killer on/off switch 0 = color killer standard mode 1 = color killer forced off mode
? 28 CXA2060BS id start (2) the position at which the secam identification pulse starts can be changed. (0.2 s/step) 0 = delayed 0.4 s to center position. 2 = center 3 = advanced 0.2 s to center position. id stop (2) the position at which the secam identification pulse stops can be changed. (0.2 s/step) 0 = delayed 0.2 s to center position. 1 = center 3 = advanced 0.4 s to center position. secam identification performance can be optimized by adjusting these together with the id level register. color is more easily applied when the identification pulse width is wide and less easily applied when it is narrow. bell f0 (6) bell filter f0 adjustment (0.7%/step) 0h = f0 ?16% 1fh = f0 center 3fh = f0 + 16% id level (2) secam identification level setting secam identification performance can be optimized by adjusting this together with id start/stop registers. 0 = color is less easily applied 3 = color is easily applied 3. rgb signal block registers picture (6) picture gain control 0h = ?5db 3fh = 0db (during 0.7vp-p input: rgb output 3.0vp-p, gamma off, drive max) bright (6) brightness control (rgb dc bias control) 0h = ?0 ire to center 1fh = ?2 ire to reference pulse 3fh = +30 ire to center (100 ire = 2.4vp-p) r drive (6) r output drive control 0h = 1.5vp-p 3fh = 3.0vp-p (picture: max) g drive (6) g output drive control 0h = 1.5vp-p 3fh = 3.0vp-p (picture: max)
? 29 CXA2060BS b drive (6) b output drive control 0h = 1.5vp-p 3fh = 3.0vp-p (picture: max) r cutoff (4) rgb output cutoff control g cutoff (4) (input current of reference pulse excluding leak component) b cutoff (4) 0h = 6.5 a 7h = 13 a fh = 19 a gamma (2) rgb output gamma correction control 0 = gamma correction off 3 = +12 ire correction to 40 ire input (picture: max) abl mode (1) switches abl mode 0 = mode in which only picture abl functions 1 = mode for both picture abl and bright abl abl vth (1) switch for switching abl control signal detection level (vth) 0 = vth: 3v 1 = vth: 1v dynamic c (1) dynamic color function on/off switch 0 = dynamic color off 1 = dynamic color on rgb sel (1) disables switching of the ys1 switch and disallows input of external signals from rgb1. 0 = ys1 standard mode 1 = ys1 forced off mode p on (1) switch for blanking all rgb output signals including the akb reference pulse (set to 0 at power on) 0 = rgb output blanking (akb reference pulse is also not output) 1 = rgb output on r on (1) switch for blanking the r output signal not including the akb reference pulse 0 = r output blanking 1 = r output on g on (1) switch for blanking the g output signal not including the akb reference pulse 0 = g output blanking 1 = g output on
? 30 CXA2060BS b on (1) switch for blanking the b output signal not including the akb reference pulse 0 = b output blanking 1 = b output on 4. deflection block registers h osc (4) h vco oscillation frequency adjustment (40hz/step) 0h = low fh = high v ss (1) switches the slice level for vertical sync signal separation 0 = 1/3 (from sync tip) 1 = 1/4 (from sync tip) h mask (1) macrovision countermeasure on/off 0 = off 1 = on h ss (1) switches the slice level for horizontal sync signal separation 0 = 1/3 (from sync tip) 1 = 1/4 (from sync tip) vtim sel (2) selects the signal output on the vtim pin (pin 5). 0 = v retrace timing pulse 1 = horizontal sync signal 2 = vertical sync separation signal 3 = do not use cd mode (2) v countdown system mode switching 0 = standard mode (used during rf signal input) 1 = mode where time constant used during countdown mode switching has been lowered from standard mode (used during vcr signal input) 2 = fixed wide window mode this setting is recommended when shortening the lock time. 3 = do not use field freq (2) sets the v frequency mode 0 = automatic identification mode (selects 50hz when there is no signal) 1 = automatic identification mode (selects 60hz when there is no signal) 2 = forced 50hz 3 = forced 60hz
? 31 CXA2060BS interlace (2) switches interlace/non-interlace mode 0, 1 = interlace mode 2 = non-interlace mode (even fields are shifted +1/2h) 3 = non-interlace mode (odd fields are shifted +1/2h) afc gain (2) afc loop gain control (pll for h sync and h vco) 0 = gain high 1 = gain medium 2 = gain low 3 = gain minimum h position (6) horizontal picture position adjustment (hafc phase control) 0h = 2 s delay (right picture position: picture delayed to hd) 3fh = 2 s advance (left picture position: picture advanced to hd) afc bow (4) vertical line bow compensation amount adjustment (phase control using hafc parabola wave) 0h = top and bottom of picture delayed 380ns to picture center 7h = center fh = top and bottom of picture advanced 380ns to picture center afc angle (4) vertical line slope compensation amount adjustment (phase control using hafc vsaw) 0h = top of picture delayed 320ns and bottom of picture advanced 320ns to picture center 7h = center fh = top of picture advanced 320ns and bottom of picture delayed 320ns to picture center left hblk (4) controls the blk width on the left side of the picture when hblk = 1 0h = +1.2 s: hblk max. width 7h = center fh = ?.2 s: hblk min. width right hblk (4) controls the blk width on the right side of the picture when hblk = 1 0h = +1.2 s: hblk max. width 7h = center fh = ?.2 s: hblk min. width hblk (1) hblk width control switch when a 16:9 crt is in 4:3 soft normal mode 0 = control off 1 = control on
? 32 CXA2060BS fh hi (1) increases the free-running frequency of the h oscillation frequency 1khz. (on mode set at power on) 0 = max. frequency mode on 1 = max. frequency mode off (standard free-running frequency) hd w (1) hd pulse width switch (set to 0 at power on) 0 = standard mode (25 s pulse width) 1 = narrow pulse width mode (use this mode when the time between the hd rising edge and fbp rising edge is short) v size (6) vertical picture size adjustment (vd output gain control) 0h = ?5% (min. size) 1fh = 0% 3fh = +15% (max. size) v position (6) vertical picture position adjustment (dc bias control for vd output) 0h = ?.1v (lowers picture position) 1fh = 0v (center 3v dc) 3fh = +0.1v (raises picture position) s correction (4) vertical s distortion correction amount adjustment (gain control for secondary component of vd) 0h = secondary component amplitude added to the vd signal is 0mvp-p fh = secondary component amplitude added to the vd signal is 100mvp-p v lineality (4) vertical linearity adjustment (gain control for secondary component of vd) 0h = 85% (picture bottom/picture top) picture top enlarged 1fh = 100% (picture bottom/picture top) 3fh = 115% (picture bottom/picture top) picture top compressed eht comp (4) high-voltage fluctuation compensation setting for vertical picture size (gain control for vd output) 0h = 0% fh = ?% (max. compensation) v on (1) vd output on/off switch (set to 0 at power on) 0 = dc voltage 1 = sawtooth wave h size (6) horizontal picture size adjustment (dc bias control for ew output) 0fh = ?.5v (small horizontal picture size) 1fh = 0v (center 4v dc) 3fh = +0.5v (large horizontal picture size)
? 33 CXA2060BS pin amp (6) horizontal pin distortion compensation amount adjustment (gain control for v parabola wave) 0h = 0.15vp-p (large horizontal size at picture top and bottom: min. compensation) 1fh = 0.7vp-p 3fh = 1.3vp-p (small horizontal size at picture top and bottom: max. compensation) corner pin (6) picture top and bottom pin distortion compensation amount adjustment (top/bottom gain control for v parabola wave) 0h = ?.4v (small horizontal size at picture top and bottom: max. compensation) 3fh = +0.4v (large horizontal size at picture top and bottom: min. compensation) trapezium (4) horizontal trapezium distortion amount compensation (phase control for parabola wave) 0h = 1.5ms advance (large horizontal size at picture top: small horizontal size at bottom) fh = 1.5ms delay (small horizontal size at picture top: large horizontal size at bottom) aspect (6) aspect ratio control (gain control for sawtooth wave) 0h = 75% 16:9 crt full 2fh = 100% 4:3 crt full 3fh = 110% scroll (6) vertical picture scroll control when a 16:9 crt is in zoom mode 0h = scrolls 32h toward picture bottom and zooms picture bottom 1fh = center 3fh = scrolls 32h toward picture top and zooms picture top upper vlin (4) adjusts vertical linearity of picture top. 0h = 100% (picture top/picture bottom) 1fh = 85% (picture top/picture bottom, picture top size is compressed) lower vlin (4) adjusts vertical linearity of picture bottom. 0h = 100% (picture bottom/picture top) 1fh = 75% (picture bottom/picture top, picture bottom size is compressed) v under scan (1) this mode is for compressing the vertical sawtooth wave. 0 = off 1 = on compressed to 50% when aspect = 0h compressed to 75% when aspect = 3fh rgb vertical blanking is increased by 10h at both top and bottom at this time. v zoom (1) zoom mode on/off switch for 16:9 crts 0 = zoom off 1 = zoom on (top and bottom of picture are together cut 25% when aspect = 2fh. rgb output also undergoes blanking during this interval.)
? 34 CXA2060BS ew dc (1) this mode lowers the dc level of the v parabola wave when 4:3 deflection is used for a 16:9 crt. 0 = off 1 = on (dc level lowered) it is necessary at this time to readjust for pin distortion when ewdc = 0 is used for the picture distortion compensation. 5. status registers h lock (1) lock status for h sync and h vco 0 = free-running status 1 = h sync and h vco are locked ikr (1) akb operation status 0 = akb loop not stable 1 = akb loop stable v ng (1) v protect status 0 = v protect off (ic normal operation status) 1 = v protect on (rgb output undergoes complete blanking at this time) h ng (1) x-ray protect status 0 = h drive output on 1 = h drive output off (hd output is high impedance at this time and rgb output undergoes blanking. it is necessary to turn the ic's power off then on again to cancel this status.) apc lock (1) lock status for input chroma signal and apc for pal/ntsc 0 = apc not locked (color killer when apc lock = 0 and secam = 0) 1 = apc locked pal (1) pal identification status when no color = 0 0 = ntsc 1 = pal or no sig (killer id on) when no color = 1 0 = ntsc or no sig (killer id on) 1 = pal secam (1) secam identification status 0 = identified as not secam (color killer when apc lock = 0 and secam = 0) 1 = identified as secam
? 35 CXA2060BS field id (1) v drive oscillation frequency 0 = 60hz mode 1 = 50hz mode h cent (1) h vco status 0 = the h vco oscillation frequency is higher than the horizontal frequency of the input signal selected by the video sw 1 = the h vco oscillation frequency is lower than the horizontal frequency of the input signal selected by the video sw x'tal id (2) crystal selection status 0 = identified as x'tal1 (pin 48 crystal) 1 = identified as x'tal2 (pin 47 crystal) 2 = identified as x'tal3 (pin 46 crystal) no vsync (1) vss presence status weak electromagnetic field detection can be performed according to rf level status. 0 = vss present 1 = vss not present rf level (2) rf weak electromagnetic field level 0 = strong electromagnetic field 1 = medium electromagnetic field 2 = weak electromagnetic field 3 = very weak electromagnetic field
? 36 CXA2060BS 0 0 0 0 0 0 0 1 1 0 0 0 1 0 0 1 1 0 * * * 1 1 1 0 * 0 0 1 bit0 bit1 bit2 bit3 bit4 bit5 bit6 bit7 sub address x x x 0 0 0 0 0 00 h x x x 0 0 0 0 1 01 h x x x 0 0 0 1 0 02 h x x x 0 0 0 1 1 03 h x x x 0 0 1 0 0 04 h x x x 0 0 1 0 1 05 h x x x 0 0 1 1 0 06 h x x x 0 0 1 1 1 07 h x x x 0 1 0 0 0 08 h x x x 0 1 0 0 1 09 h x x x 0 1 0 1 0 0a h x x x 0 1 0 1 1 0b h x x x 0 1 1 0 0 0c h x x x 0 1 1 0 1 0d h x x x 0 1 1 1 0 0e h x x x 0 1 1 1 1 0f h x x x 1 0 0 0 0 10 h x x x 1 0 0 0 1 11 h x x x 1 0 0 1 0 12 h x x x 1 0 0 1 1 13 h x x x 1 0 1 0 0 14 h x x x 1 0 1 0 1 15 h x x x 1 0 1 1 0 16 h x x x 1 0 1 1 1 17 h x x x 1 1 0 0 0 18 h x x x 1 1 0 0 1 19 h x x x 1 1 0 1 0 1a h x x x 1 1 0 1 1 1b h x x x 1 1 1 0 0 1c h 0 0 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 0 1 0 0 1 0 0 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 0 0 1 1 0 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 0 0 1 1 0 0 1 1 1 1 0 0 1 1 1 0 0 1 1 0 1 1 1 1 0 0 0 1 1 0 0 1 0 0 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 0 0 1 0 0 0 0 1 1 1 0 0 1 0 * 0 1 * * * * 1 1 1 0 0 0 1 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 i 2 c bus power-on initial settings the initial settings listed here for power-on when v drive starts to oscillate are reference values; the actual settings may be determined as needed according to the conditions under which the set is to be used. register table " * ": undefined control registers
? 37 CXA2060BS description of operation 1. power-on sequence the CXA2060BS does not have an internal power-on sequence. therefore, all power-on sequences are controlled by the set microcomputer (i 2 c bus controller). (1) power-on the ic is reset and the rgb outputs are all blanked. h drive starts to oscillate, but oscillation is at the maximum frequency (16khz or more) and is not synchronized with the input signal in order to prevent fbt (flyback transformer for generating high voltage) h squealing. output of vertical signal v tim starts, but v drive is dc output. bus registers which are set by power-on reset are as follows. p on = 0: rgb all blanked on hd w = 0: normal mode v on = 0: v output stopped mode fh high = 0: h oscillator maximum frequency mode aging = 0: all white output aging mode off yuv out = 0 (2) bus register data transfer the register setting sequence differs according to the set sequence. register settings for the following sequence are shown as an example. set sequence CXA2060BS register settings power-on reset status in (1) above. degauss reset status in (1) above. the crt is degaussed in a completely darkened condition. v drive oscillation the ic is set to the power-on initial settings. (see the following page.) a sawtooth wave is output to v drive and the ic waits for the vertical deflection to stabilize. the h drive oscillator frequency goes to the standard frequency. akb operation start r on, g on and b on are set to 0. p on is set to 1 and a reference pulse is output from rgbout. then, the ic waits for the cathode to warm up and the beam current to start flowing. akb loop stable status register ikr is monitored. ikr = 0: unstable ikr = 1: stable note that the time until ikr = 1 is returned differs according to the initial status of the cathode. also note that the time until ikr = 1 results may differ from the actual time until the cathode current stabilizes. it is recommended that video output start after ikr = 1 has been established for 1 or 2 seconds. video output r on, g on and b on are set to 1 and the video signal is output from rgbout.
? 38 CXA2060BS (3) power-on initial settings the initial settings listed here for power-on when v drive starts to oscillate are reference values; the actual settings may be determined as needed according to the conditions under which the set is to be used. p on = 0 rgb all blanked hd w = 0 normal axis pal = 0 pal axis forced off v on = 1 v drive oscillation fh high = 1 h oscillation frequency standard yuv out = 0 r2 in/g2 in/b2 in signal input mode aging = 0 aging mode off video sel = 0 tv signal input (user) s sel = 0 tv/cvbs1/cvbs2 input or mute selection (user) r on = 0 rch video output blanked g on = 0 gch video output blanked b on = 0 bch video output blanked y sel = 0 yuv sw standard operation x'tal = 3 auto col system = 3 auto col loop = 1 automatic identification for pal/secam/ntsc/ntsc4.43 c bpf = 1 c bpf on c trap off = 0 c trap on picture = 3fh max (user control) no color = 0 pal identification output to status (when there is no signal) fsc sw = 0 fsc off color = 1fh center (user control) c off = 0 chroma signal on killer off = 0 color killer normal mode hue = 1fh center (user control) shp f0 = 0 2.5mhz axis ntsc = 0 japan axis bright = 1fh center (user control) dc tran = 0 100% pre/over = 0 sharpness pre/over ratio 1:1 sharpness = 7h center (user control) r cutoff = 7h center (adjust) g cutoff = 7h center (adjust) b cutoff = 7h center (adjust) r drive = 1fh center (adjust) abl mode = 1 picture abl/bright abl combination mode abl vth = 0 vth = 3v g drive = 1fh center (adjust) dy col = 0 dynamic color off rgb sel = 0 ys1 sw normal mode b drive = 1fh center (adjust) gamma = 0 gamma off h osc = 7h center (adjust) y delay = 7h center (adjust) field freq = 0 auto cd mode = 0 normal
? 39 CXA2060BS (power-on initial settings continued) interlace = 0 interlace mode h ss = 0 slice level 1/3 (from sync tip) v ss = 0 slice level 1/3 (from sync tip) v size = 1fh center (adjust) h mask = 0 macrovision countermeasure off v position = 1fh center (adjust) afc gain = 1 gain medium s correction = 7h center (adjust) v lineality = 7h center (adjust) h size = 1fh center (adjust) ew dc = 0 off h position = 1fh center (adjust) pin amp = 1fh center (adjust) corner pin = 1fh center (adjust) trapezium = 7h center (adjust) eht comp = 7h center (adjust) afc bow = 7h center (adjust) afc angle = 7h center (adjust) left hblk = 7h hblk width min. right hblk = 7h hblk width min. aspect = 2fh 100% hblk = 0 control off v under scan = 0 off scroll = 1fh center (user control) v zoom = 0 zoom off upper vlin = 0h 100% (no compression) lower vlin = 0h 100% (no compression) vtim sel = 0 v retrace pulse timing pulse id stop = 1 center id start = 2 center bell f0 = 1fh center id level = 1 center 2. various mode settings the CXA2060BS contains bus registers for deflection compensation which can be set for various wide modes. wide mode setting registers can be used separately from registers for normal picture distortion adjustment, and once picture distortion adjustment has been performed in full mode, wide mode settings can be made simply by changing the corresponding register. ? vertical picture distortion adjustment registers v size, v position, s correction, v linearity ? horizontal picture distortion adjustment registers h size, ew dc, pin amp, corner pin, trapezium, afc bow, afc angle, h position ? wide mode setting registers left hblk, right hblk, aspect, hblk, v under scan, scroll, v zoom, upper vlin, lower vlin
? 40 CXA2060BS various mode settings 1)-1 1)-2 2) 3) 4) 5) 6) 7) 8) 16:9 16:9 16:9 16:9 16:9 16:9 16:9 4:3 4:3 16:9 4:3 4:3 16:9 4:3 4:3 (16:9 + subtitles) 4:3 4:3 4:3 16:9 full wide full normal zoom subtitle-in split screen mode wide zoom 4:3 normal v compression standard value for 16:9 crts standard value for 16:9 crts aspect = 0h: v size 75% hblk = 1: hblk width adjustment on left hblk = adjustment right hblk = adjustment pin amp = adjustment ew dc = 1 aspect = 2fh: v size 100% v zoom = 1: zoom on (v size limited to 75%) scroll = 0h: zoom bottom of picture 1fh: zoom center of picture 3fh: zoom top of picture aspect = 2fh: v size 100% up vlin = adjustment: top of picture slightly compressed lo vlin = adjustment: bottom of picture greatly compressed v zoom = 1: v size limited to 75% scroll = adjustment v under scan = 1: compressed aspect = adjustment: v size 90% up vlin = adjustment lo vlin = adjustment (s corr = adjustment) standard value for 4:3 crts aspect = adjustment v under scan = 1: v size 80% (compressed to a total of 75%) setting crt size soft size mode name i 2 c bus register * since the amount of compensation for distortion in the vertical position of a crt does not change due to the above modes, it is possible to use initial values for all screen distortion registers. top and bottom of picture compressed
? 41 CXA2060BS mode examples are given below. the 570 actual number of scanning lines displayed under pal (480 lines for ntsc) will be used in the description. data stored in the wide mode setting registers is also given. note that actual adjustment values may differ slightly due to variations among different ics. standard setting data differs for 16:9 crts and 4:3 crts. (standard value) register 16:9 crt 4:3 crt aspect 0h 2fh scroll 1fh 1fh v zoom 1 0 upper vlin 0h 0h lower vlin 0h 0h v under scan 0 0 hblk 0 0 left hblk 7h 7h right hblk 7h 7h 1) full mode this mode reproduces the full 570 (ntsc: 480) lines on a 16:9 crt. normal 4:3 images are compressed vertically, but in the case of a squeezed video source which compresses 16:9 images to 4:3 images, 16:9 images are reproduced in their original 16:9 aspect ratio. the register settings are the 16:9 crt standard values. 2) normal mode in this mode, 4:3 images are reproduced without modification on a 16:9 crt. a black border appears at the left and right of the picture. in this mode, the h deflection size must be compressed by 25% compared to full mode. the CXA2060BS performs compression with a register (ew dc) that compresses the h size. because excessive current flows to the horizontal deflection circuit in this case, adequate consideration must be given to the allowable power dissipation, etc., of the horizontal deflection coil in the design of the set. in addition, this concern can also be addressed through measures taken external to the ic, such as switching the horizontal deflection coil. full mode should be used when performing memory processing to add a black border to the video signal. h blanking of the image normally uses the flyback pulse input from hp/protect (pin 18). however, the blanking width can be varied according to the control register setting when blanking is insufficient for the right and left black borders. change the following three settings with respect to the 16:9 crt standard values for the register settings. hblk = 1 left hblk = adjustment value right hblk = adjustment value the h angle of deflection decreases, causing it to differ from the pin compensation amount during h size full status. therefore, in addition to the wide mode registers, pin amp must also be readjusted only for this mode.
? 42 CXA2060BS 3) zoom mode in this mode, 4:3 images are reproduced on a 16:9 crt by enlarging the picture without other modification. the top and bottom of normal 4:3 images are lost, but almost the entire picture can be reproduced for vista size video software, etc. which already has black borders at the top and bottom. setting the aspect register to 2fh (100%) allows zooming to be performed for 4:3 images without distortion. in this case, the number of scanning lines is reduced to 430 lines compared to 570 lines for full mode. the zooming position can be shifted vertically by the scroll register. v blanking of the image normally begins from v sync and continues for 2h after the akb reference pulse, but the top and bottom parts which are lost are also blanked during this mode. adjust the following two registers with respect to the 16:9 crt standard values for the register settings. aspect = 2fh scroll = 1fh or user control 4) subtitle-in mode when cinema scope images which have black borders at the top and bottom of the picture are merely enlarged with the zoom mode in 3) above, the subtitles present in the black borders may be lost. therefore, this mode is used to super-compress only the subtitle part and reproduce it on the display. add the lower vlin adjustment to the zoom mode settings for the register settings. aspect = 2fh scroll = 1fh or user control lower vlin = adjustment value lower vlin causes the linearity at the bottom of the picture to deteriorate. therefore, upper vlin should also be adjusted if the top and bottom of the picture are to be made symmetrical. since the picture is compressed vertically, the number of scanning lines exceeds 430 lines. 5) two-picture mode this mode is used to reproduce two 4:3 video displays on a 16:9 crt such as for p and p. to achieve this, the v size must be further compressed from the condition where aspect = 0 (v size 75%: full mode). this ic performs this compression with v under scan. 16:9 crt standard values are used with only v under scan changed to 1 for the register settings. v under scan = 1 6) wide zoom mode this mode reproduces 4:3 video software naturally on wide displays by enlarging 4:3 images without other modification and compressing the parts of the image which protrude from the picture into the top and bottom parts of the picture. the display enlargement ratio is controlled by aspect, and the compression ratios at the top and bottom of the picture are controlled by upper vlin and lower vlin. adjust the following three registers with respect to the 16:9 crt standard values for the register settings. aspect = adjustment value upper vlin = adjustment value lower vlin = adjustment value 7) 4:3 crt normal mode this is the standard mode for 4:3 crts. the register settings are the 4:3 crt standard values.
? 43 CXA2060BS 8) v compression mode this mode is used to reproduce m-n converter output consisting of 16:9 images expanded to 4:3 aspect ratio and other squeezed signals without distortion on a 4:3 crt. in this case, the v size must be compressed to 75%. this is done using v under scan in 5) above. setting v under scan to on compresses the v size to 75%. fine adjustment of the v size is possible by adding the aspect adjustment. 4:3 crt standard values are used with the aspect and v under scan settings changed for the register settings. aspect = adjustment v under scan = 1
? 44 CXA2060BS video sw s e l e c t o r t v / c 2 - i n y 1 / c v b s 1 - i n i n p u t : 1 . 0 v p - p y 2 / c v b s 2 - i n c 1 - i n c o m b y - i n i n p u t : 2 . 0 v p - p c o m b c - i n 2 t o 3 a b i 2 c : v i d e o s e l 2 t o 4 c d i 2 c : s s e l v i d e o s e l e c t o r m i x 6 d b 6 d b + 6 d b m o n - o u t 2 v p - p t o - c b u r s t : 2 5 0 m v p - p s e l e c t o r s e l e c t o r 1 1 d b + 1 2 d b t o - s s e p s i g 4 v p - p ( w i t h s y n c ) t o - y s i g 2 0 0 m v p - p ( w i t h o u t s y n c ) 0 0 1 1 1 1 0 0 1 1 0 1 0 1 1 1 0 1 0 1 0 0 0 0 0 1 1 1 1 1 0 0 0 0 1 0 1 1 1 1 tv cvbs1 cvbs2 nosig y1 y2 comby comby comby nosig tv cvbs1 cvbs2 nosig c1 c2 combc combc combc nosig tv cvbs1 cvbs2 nosig y1 + c1 y2 + c2 tv cvbs1 cvbs2 nosig a b c d to-y to-c mon-out
? 45 CXA2060BS [color status] input apc lock pal secam x'tal id 3.58 ntsc 4.43 ntsc pal pal60 secam pal-m pal-n no color signal 1 1 1 1 0 1 1 0 0 0 1 1 0 1 1 0 0 0 0 0 1 0 0 0 01 00 00 00 00 00 10 ** field id 0 0 1 0 1 0 1 *
? 46 CXA2060BS 3. signal processing the CXA2060BS consists of separate blocks for sync signal processing, h deflection signal processing, v deflection signal processing and y/c and rgb signal processing, all controlled by an i 2 c bus. 1) sync signal processing the y signal selected by the video switch is sync separated by a horizontal/vertical sync separation circuit. a phase comparison between the horizontal sync split signal obtained and the h vco output signal is conducted and an afc loop is configured, and an h pulse synchronized to h sync is created within the ic. when afc is locked to h sync, 1 is output to the status register (h lock). this can be used to detect the presence of a video signal. the vertical sync split signal is sent to the v countdown block and v deflection timing is obtained by the appropriate window processing. v cycle timing such as the akb reference pulse is generated using this v timing pulse. the v retrace timing pulse and sync split signal are output on v tim (pin 5) according to the v timsel register setting. 2) h deflection signal processing a phase comparison is conducted between the h pulse obtained from sync processing and the h deflection pulse input on pin 18 (hp/protect) and the horizontal position of the picture displayed on the crt is controlled by controlling the phase of h drive output. the compensation signal created using the vertical sawtooth wave is superimposed and vertical picture distortion compensation is also performed. the h deflection pulse is used for h blanking of the video signal. if the width of the h deflection pulse is narrow, a pulse created by the ic can be added and the result used as the h blanking pulse (hblk). although pin 18 is for normal pulse input, the pin is kept lowered to near gnd level, h drive output is stopped and 1 is output to the status register (h ng). it is necessary to turn the ic's power off and on again in order to cancel this status. 3) v deflection signal processing the vertical sawtooth wave oscillates in sync with the v timing pulse cycle output by the countdown. after wide deflection processing is added to this sawtooth wave, it undergoes picture distortion adjustment by the function circuits v drive and ew drive, respectively, and the result is output as the v drive and ew drive signals. 4) y signal processing the y/cvbs signal selected by the video switch is sent to the y signal processing circuit. the y signal is sent to the rgb signal processing circuit via a trap filter for eliminating the chroma signal, a delay line, sharpness control, clamp, and black expansion circuits. in addition, the output of the y signal processing circuit can be monitored using pin 32 (r2 in) by setting register yuv out to 1. (at this time, be sure to connect a 10k w resistor to vcc as a load for pin 32.) also, a differential waveform of the y signal synchronized with yout (rgb out) is output from pin 15 as vm out. when the cvbs signal is selected, set the c trap off register to 0 (trap filter on), and when the y signal split from y/c separation is selected, set this register to 1 (trap filter off). the internal filter f0 is adjusted automatically within the ic. since the filter f0 does not settle down while the color killer is operating, be sure to set the trap filter to off if it is an obstacle.
? 47 CXA2060BS 5) c signal processing the tv, cvbs or chroma (pal, ntsc) signals (specified input: burst level 300mvp-p) selected by the video sw pass through an acc, chroma band-pass filter, chroma amplifier, and demodulation circuit to form the color difference signals r-y and b-y. after being processed by 1hdl the signals are input to the rgb signal processing circuit. the output signals (color difference signals) of this c signal processing circuit can be monitored, just like y output, using pin 30 (b2 in) and pin 31 (g2 in) by setting the register yuv out to 1. b-y is output from pin 30 (b2 in) and r-y is output from pin 31 (g2 in). (at this time, be sure to connect a 10k w resistor to vcc as a load for pins 30 and 31.) the color killer is activated when the burst level falls ?6db or more below the specified input. the secam signal (specified input: r-yid: 215mvp-p, b-yid: 167mvp-p) passes through an acc, bell filter, limiter amplifier, demodulation circuit, line blanking circuit, and de-emphasis circuit to form the color difference signals r-y and b-y. after being processed by 1hdl the signals are input to the rgb signal processing circuit. in addition, the color system (pal, ntsc or secam) and sub-carrier frequency (4.43mhz or 3.58mhz) are automatically identified according to the input chroma signal. circuits such as the internal vco, demodulation circuit and color axis circuit of the rgb signal processing block (described below) are automatically adjusted. the system is selected either automatically by the i 2 c bus (col system and x'tal) or by forcible modes. the color system status selected using the status registers ntsc/pal, secam and x'tal id is output (refer to the color status table). 6) rgb signal processing the y and color difference signals obtained by the y/c signal processing circuit are first input to the yuv sw, then selected and switched with the external y and color difference signals. after the selected y and color difference signals are used to form the g-y signal in the next axis circuit (including color control), they are used for the rgb signals. next, these signals pass through the external rgb signal sw circuits ys1 sw and ym sw (half-tone sw), external rgb signal sw circuit ys2 sw, dynamic color, picture control, gamma correction, clamp, brightness control, drive control, and cutoff control circuits, and are then output on pin 22 (rout), pin 23 (gout), and pin 24 (bout). an external rgb signal (100 ire 100% white: 0.7vp-p) conforming to normal video signal specifications is input to pins 26, 27 and 28 and pins 30, 31 and 32. the voltage added to pin 3 (abl in) is compared to the reference voltage within the ic and then integrated by the capacitor connected to pin 42 (abl fil) to form a control signal used for picture control and brightness control. the abl mode can be selected using the register abl mode for switching such that only picture control is performed or so that both picture control and brightness control are performed. there is a protective function such that brightness control is activated even when only picture control is being performed if beam current flows excessively. this ic includes two functions for performing white balance and black balance adjustments: drive control for performing gain adjustment between rgb outputs and cutoff control for performing dc level adjustments between rgb outputs. these can be independently controlled for three channels by the i 2 c bus. in addition to this, the cutoff control function also includes an auto-cutoff function (akb) which performs automatic adjustment by forming a loop between the ic and crt. this can compensate for temporal variations of the crt.
? 48 CXA2060BS auto-cutoff functions are as follows. r, g, and b reference pulses for auto cutoff, shifted 1h each in the order mentioned, appear at the top of the picture (actually, in the overscan portion). the reference pulse uses 1h in the v blanking interval, and is output from each r, g and b output pin. the rgb cathode current (ik) is input to pin 21 (ik in). the cathode current input to pin 21 (ik in) is converted to a voltage within the ic. the reference pulse interval of this voltage is compared with the reference voltage within the ic, and a current generated by this voltage difference is used to charge a capacitor within the ic. this charge is held at times other than the reference pulse interval. the dc level of the rgb output changes according to the voltage generated by the capacitor. a loop functions to make the voltage converted from the current input to pin 21 (ik in) match the reference voltage within the ic. the ic internal reference voltages for r, g and b undergo cutoff control by the i 2 c bus and can be independently adjusted. the cathode signal current flowing during the reference pulse interval should be about 13 a at the cutoff control center. the ic can also handle up to 100 a cathode leak current flowing during blanking. large current flows during the video interval, and this leads to destruction around ik in, be absolutely sure to connect a zener diode of about 4v to the ik in pin.
? 49 CXA2060BS 4. notes on operation because the r, g and b signals and deflection signals output from the CXA2060BS are dc direct connected, the pattern (set board) must be designed with consideration given to minimizing interference from around the power supply and gnd. do not separate the gnd patterns for each pin; a solid earth is ideal. locate the power supply side of the by-pass capacitor which is inserted between the power supply and gnd as near to the pin as possible. also, locate the crystal oscillator and iref resistor as near to the pin as possible, and be sure that signal lines do not pass close to these pins. drive the y, external y/color difference and external rgb signals at a sufficiently low impedance, as these signals are clamped when they are input using the capacitor connected to the input pin. use a resistor (such as a meal film resistor) with an error of less than 1% for the iref pin. be sure that vcc1 and vcc2 have the same electric potential. use crystals manufactured by daishinku corp. properties of this ic are not guaranteed if used with crystals from another manufacturer.
? 50 CXA2060BS curve data i 2 c bus data conforms to the "i 2 c bus register initial settings" of the electrical characteristics measurement conditions. 3 1 0 0 t i m e [ m s ] v _ l i n e v [ v ] 3 . 5 4 4 . 5 2 . 5 2 0 1 5 5 v _ l i n e = 0 v _ l i n e = 7 v _ l i n e = f v [ v ] 3 1 0 0 t i m e [ m s ] s _ c o r r 3 . 5 4 4 . 5 2 . 5 2 0 1 5 5 s _ c o r r = 0 s _ c o r r = 7 s _ c o r r = f 0 1 0 t i m e [ m s ] v _ p o s i t i o n v [ v ] 3 . 5 4 4 . 5 2 . 5 2 0 1 5 5 3 1 0 3 . 5 4 4 . 5 2 . 5 2 0 1 5 5 3 v _ p o s i t i o n = 0 v _ p o s i t i o n = 1 f v _ p o s i t i o n = 3 f 3 1 0 0 t i m e [ m s ] v _ s i z e v [ v ] 3 . 5 4 4 . 5 2 . 5 2 0 1 5 5 v _ s i z e = 0 v _ s i z e = 1 f v _ s i z e = 3 f 3 1 0 0 v _ a s p e c t v [ v ] 3 . 5 4 4 . 5 2 . 5 2 0 1 5 5 v _ a s p e c t = 0 v _ a s p e c t = 2 f v _ a s p e c t = 3 f t i m e [ m s ] 3 1 0 0 t i m e [ m s ] v _ s c r o l l v [ v ] 3 . 5 4 4 . 5 2 . 5 2 0 1 5 5 v _ s c r o l l = 0 v _ s c r o l l = 1 f v _ s c r o l l = 3 f
? 51 CXA2060BS 1 0 0 t i m e [ m s ] v [ v ] c o _ p i n 3 3 . 5 4 4 . 5 2 . 5 2 0 5 1 5 c o _ p i n = 0 c o _ p i n = 1 f c o _ p i n = 3 f 1 0 0 t i m e [ m s ] t r a p e z i u m v [ v ] 3 3 . 5 4 4 . 5 2 . 5 2 0 5 1 5 t r a p e z i u m = 0 t r a p e z i u m = 7 t r a p e z i u m = f p i n _ a m p v [ v ] 3 3 . 5 4 4 . 5 1 0 0 t i m e [ m s ] 2 . 5 2 0 5 1 5 p i n _ a m p = 0 p i n _ a m p = 1 f p i n _ a m p = 3 f 1 0 0 t i m e [ m s ] l o _ v l i n v [ v ] 3 3 . 5 4 4 . 5 2 . 5 2 0 5 1 5 l o _ v l i n = 0 l o _ v l i n = 7 l o _ v l i n = f 1 0 0 t i m e [ m s ] u p _ v l i n v [ v ] 3 3 . 5 4 4 . 5 2 . 5 2 0 5 1 5 u p _ v l i n = 0 u p _ v l i n = 7 u p _ v l i n = f 1 0 0 t i m e [ m s ] h _ s i z e v [ v ] 3 3 . 5 4 5 2 . 5 2 0 5 1 5 h _ s i z e = 0 h _ s i z e = 1 f h _ s i z e = 3 f 4 . 5
? 52 CXA2060BS 3 0 0 d a t a h _ p o s i t i o n t i m e [ s ] 1 . 5 0 . 5 0 . 5 2 . 5 2 . 5 6 0 4 0 1 0 5 0 2 0 2 2 1 0 1 . 5 1 3 0 0 d a t a p i c t u r e g a i n [ d b ] 1 6 1 2 4 4 2 0 6 0 8 0 4 0 1 0 5 0 2 0 3 0 d a t a t r a p o f f g a i n [ d b ] 4 0 3 0 2 0 0 5 0 6 1 0 4 1 5 2 3 . 5 m h z t r a p o f f = 0 t r a p o f f = 1 4 . 4 3 m h z t r a p o f f = 0 1 0 0 d a t a s h a r p n e s s g a i n [ d b ] 2 2 6 1 0 6 1 5 5 4 0 4 8 s h p - f 0 = 3 . 0 m h z s h p - f 0 = 2 . 5 m h z 5 0 d a t a y _ d e l a y t i m e [ n s ] 7 0 0 9 0 0 1 1 0 0 1 2 0 0 6 0 0 1 5 8 0 0 1 0 0 0 1 0 n t s c / p a l s e c a m 3 0 0 d a t a c o l o r g a i n [ d b ] 2 0 1 0 0 1 0 3 0 6 0 2 5 1 5 5 5 4 0 1 0 5 0 2 0
? 53 CXA2060BS 3 0 0 d a t a b r i g h t p o t e n t i a l d i f f e r e n c e b e t w e e n g c h r e f e r e n c e p u l s e l e v e l a n d b l a c k l e v e l [ v p - p ] 0 . 8 0 . 4 0 0 . 4 1 6 0 0 . 6 0 . 2 0 . 2 4 0 1 0 5 0 2 0 3 0 0 d a t a r - d r i v e , g - d r i v e , b - d r i v e g a i n [ d b ] 2 0 2 4 4 6 0 4 0 1 0 5 0 2 0 5 0 d a t a c u t _ o f f ( r , g , b ) i n p u t c u r r e n t o f r e f e r e n c e p u l s e [ m a ] 5 1 0 1 5 2 0 0 1 5 1 0 4 0 0 c v i n i n p u t a m p l i t u d e [ i r e ] g a m m a g c h o u t p u t [ v ] 2 2 . 5 3 . 5 4 . 5 1 . 5 1 0 0 3 4 6 0 2 0 8 0 g a m m a = 0 g a m m a = 1 g a m m a = 2 g a m m a = 3
? 54 CXA2060BS package outline unit: mm 4 8 p i n s d i p ( p l a s t i c ) 1 3 . 0 + 0 . 3 0 . 1 4 . 6 + 0 . 4 0 . 1 0 . 2 5 + 0 . 1 0 . 0 5 4 8 2 5 1 2 4 1 . 7 7 8 1 5 . 2 4 0 t o 1 5 0 . 5 0 . 1 0 . 9 0 . 1 5 3 . 0 m i n 0 . 5 m i n s o n y c o d e e i a j c o d e j e d e c c o d e p a c k a g e s t r u c t u r e p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e m a s s e p o x y r e s i n p l a t i n g 4 2 / c o p p e r a l l o y 5 . 1 g s d i p - 4 8 p - 0 2 s d i p 0 4 8 - p - 0 6 0 0 4 3 . 2 + 0 . 4 0 . 1 s o l d e r / p a l l a d i u m 1 . a l l m a t s u r f a c e t y p e . t w o k i n d s o f p a c k a g e s u r f a c e : 2 . c e n t e r p a r t i s m i r r o r s u r f a c e . n o t e : p a l l a d i u m p l a t i n g t h i s p r o d u c t u s e s s - p d p p f ( s o n y s p e c . - p a l l a d i u m p r e - p l a t e d l e a d f r a m e ) .

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